Erfurt 是 Xaoc Devices Leibniz Binary Subsystem 中的重要數位核心模組,本質上是一個雙向(bi-directional)數位計數器(digital counter)與分頻器(frequency divider),同時也可視為一個可程式化的數位相位累加器(Phase Accumulator)。其設計源自 1980 年代末期的數位邏輯概念,完全基於 CMOS logic 架構運作,不依賴任何 CPU 或微控制器,使其在高頻運作時依然保持極高穩定度,甚至可超越可聽音訊頻率而不產生 aliasing 或時脈干擾。
在 Leibniz Binary Subsystem 架構中,Erfurt 扮演著「數位時間與相位推進器」的角色。其計數器輸出可作為相位來源(phase source),用於驅動數位 wavetable,或搭配其他 Leibniz 模組進行更複雜的二進位資料處理。例如,與 Jena 搭配時,可用於掃描 waveshape;與 Drezno 結合時,能產生階梯式電壓,進而控制 VCO 產生非線性滑音(glissandi);連接 Odessa 時,則可用 gate pattern 動態調變諧波音色結構;若回授至 Lipsk,甚至能產生具偽混沌(pseudo-chaotic)特性的序列。
即便在不使用其他 Leibniz 模組的情況下,Erfurt 依然能獨立運作,作為一個 8 輸出的 clock divider 與 audio frequency divider。這使它在傳統 Eurorack 系統中,也能勝任時脈分配、節奏生成、音訊分頻與數位控制等工作。
此外,Erfurt 內建一組高速內部時脈(HF clock),在沒有外部 clock 或資料來源的情況下,也能驅動模組運作,特別適合搭配靜態或非時脈化的數位資料來源。
產品特色
Leibniz Binary Subsystem 的核心元件之一
雙向(bi-directional)二進位數位計數器
相位累加器(Phase Accumulator)架構
可程式化數位振盪器(Programmable Digital Oscillator)
可作為 clock 與 audio frequency divider 使用
基於 CMOS logic 設計,無 CPU 架構
可在高於音訊頻率下運作,無 aliasing
內建高速(HF)內部時脈來源
可獨立使用,也可與 Leibniz 系統深度整合
詳細規格
模組格式:Eurorack
系統架構:CMOS logic(無 CPU)
功能類型:
Binary Counter
Phase Accumulator
Digital Oscillator
Clock / Audio Frequency Divider
輸出通道數:8
寬度:6 HP
深度:skiff friendly
電流消耗:
+12V:25 mA
-12V:30 mA
反接保護(Reverse power protection):有
Leibniz Binary Subsystem 擴充相容性說明
Drezno
Leibniz 系統的 ADC / DAC 前端模組,可將類比訊號轉換為二進位資料,亦可反向輸出類比電壓,可單獨使用或作為系統核心介面。
Lipsk
二進位邏輯處理擴充模組,可對個別 bit 進行反相(invert)與邏輯操作,適合建立複雜數位回授與變化結構。
Jena
多功能數位模組,可作為 CV / Audio waveshaper、wavetable oscillator、Walsh function generator 或節奏產生器。
Poczdam
Leibniz Binary Subsystem 的二進位資料路由模組,可在兩組資料來源間進行手動或遠端切換。
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