Doepfer A-160-2 Clock/Trigger Divider II | DigiLog 聲響實驗室
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Doepfer A-160-2 Clock/Trigger Divider II

Free shipping orders over NTD 3,000

促銷價 NT$ 3,990

Pay installments 3 / 6
30 利率,每期 NT$ 1,330
60 利率,每期 NT$ 665

Status: 補貨中

Free 1-year Warranty (except all cable, accessories and modulars)
Free shipping orders over NTD 3,000
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Module A-160-2 is an enhanced version of the standard clock divider A-160. The module is a frequency divider for clock/trigger/gate signals, designed to be a source of lower frequencies, particularly for rhythm uses. The Clock input will take any digital signal from, eg., an LFO, MIDI sync, or the gate from a MIDI-CV interface. At the outputs, you have access to three sets of seven different sub-divided clock signals, from half the clock frequency down to 1/128. The low/high levels of the output signals are 0V and about +10V.
The A-160-2 also has a reset input. Whenever a reset signal is sensed, all outputs are set to certain levels which depend upon the selected mode.

These are the most important features of the module:

  • Three different sets of dividing factors, selected by a three-position switch at the front panel:

    • power of two: 2, 4, 8, 16, 32, 64, 128

    • prime numbers: 2, 3, 5, 7, 11, 13, 17

    • integer: 2, 3, 4, 5, 6, 7, 8

  • Two output modes, selected by a two-position switch at the front panel:

    • Gate mode: outputs act like the outputs of typical binary dividers

    • Trigger mode: in this mode the outputs are AND-wired with the clock signal (i.e. the clock pulsewidth affects the pulsewidth of the outputs)

    • (the center position labelled "Cst" has no meaning so far, please refer to the note at the bottom of the page)

  • Clock edge type selected by a jumper on the pc board:

    • positive: the rising edge of the clock signal triggers the state change of the outputs

    • negative: the falling edge of the clock signal triggers the state change of the outputs

  • Reset behaviour by two jumpers on the pc board:

    • level triggered: the level at the Reset input triggers the Reset

    • edge triggered: the edge of the signal at the Reset input triggers the Reset

    • positive: a high level (> 2.5V) or the rising edge at the Reset input triggers the Reset

    • negative: a low level (< 1 V) or the falling edge at the Reset input triggers the Reset

  • Output polarity selected by a jumper on the pc board:

    • positive: non-inverted outputs

    • negative: all seven outputs are inverted

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